Check out the recorded webinar
Using Circuit Instead of RLC Boundaries to Optimize Passives and Dramatically Speed up HFSS simulations
Join us for this KETIV Virtual Academy session where Ansys Application Engineer, Graham Stevens introduces a method to substitute the use of lumped ports in place of passive RLC Boundaries to allow modeling and optimization of passives within the Circuit tool rather than as part of an HFSS model. Optimizing passive values outside HFSS can significantly speed up simulations that use passive components.
Session Presenters
Graham Stevens
Application Engineer, Simulation
Graham Stevens is a certified ANSYS Application Engineer (AE) and has been designing new products for over 25 years. His focus is on bringing products from the laboratory into production and cost reduction, and serves as a simulation AE for low frequency and high frequency electronics, electronics cooling and reliability, optics, optimization, and multi-physics. He has a B.S. in Physics, and a Masters in Manufacturing Engineering
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